JPS585362U - リ−ドフレ−ム基板 - Google Patents

リ−ドフレ−ム基板

Info

Publication number
JPS585362U
JPS585362U JP1981098744U JP9874481U JPS585362U JP S585362 U JPS585362 U JP S585362U JP 1981098744 U JP1981098744 U JP 1981098744U JP 9874481 U JP9874481 U JP 9874481U JP S585362 U JPS585362 U JP S585362U
Authority
JP
Japan
Prior art keywords
lead
lead frame
mounting
frame board
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1981098744U
Other languages
English (en)
Japanese (ja)
Other versions
JPS6218069Y2 (en]
Inventor
細見 幸弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP1981098744U priority Critical patent/JPS585362U/ja
Publication of JPS585362U publication Critical patent/JPS585362U/ja
Application granted granted Critical
Publication of JPS6218069Y2 publication Critical patent/JPS6218069Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
JP1981098744U 1981-07-01 1981-07-01 リ−ドフレ−ム基板 Granted JPS585362U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1981098744U JPS585362U (ja) 1981-07-01 1981-07-01 リ−ドフレ−ム基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1981098744U JPS585362U (ja) 1981-07-01 1981-07-01 リ−ドフレ−ム基板

Publications (2)

Publication Number Publication Date
JPS585362U true JPS585362U (ja) 1983-01-13
JPS6218069Y2 JPS6218069Y2 (en]) 1987-05-09

Family

ID=29893494

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1981098744U Granted JPS585362U (ja) 1981-07-01 1981-07-01 リ−ドフレ−ム基板

Country Status (1)

Country Link
JP (1) JPS585362U (en])

Also Published As

Publication number Publication date
JPS6218069Y2 (en]) 1987-05-09

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